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? 1 ? CXA3355ER 44 pin vqfn (plastic) description the CXA3355ER is an ic developed as a gps rf down converter. this ic realizes a reduction in the number of external parts by integrating an lna, image rejection mixer, if filter, pll and vco (l, c) into a small package with low current consumption. features ? includes all functions required for the gps down converter low voltage operation: v cc = 1.6 to 2.0v low current consumption (active mode): 11ma (typ. at v cc = 1.8v, if 1mhz) low current consumption (power save mode) < 1a total gain 100db total nf 4db on-chip vco and pll supports typical tcxo frequencies (13mhz, 16.368mhz, 18.414mhz, etc.) on-chip lna (lna nf: 2.0db) image rejection mixer on-chip if filter, and an external filter can be connected as an option for further band narrowing. 1-bit if output antenna sense function applications gps down converter ic structure sige bicmos monolithic ic gps down converter ic absolute maximum ratings (ta = 25c) supply voltage v cc 1 ?0.2 to +2.5 v v cc 2 ?0.2 to +3.6 v v cc 3 ?0.2 to +3.6 v operating temperature topr ?40 to +85 c storage temperature tstg ?65 to +150 c recommended operating conditions supply voltage v cc 1 1.6 to 2.0 v v cc 2 1.6 to 3.3 v v cc 3 2.7 to 3.3 v e04156-ps sony reserves the right to change products and specifications without prior notice. this information does not convey any licens e by any implication or otherwise under any patents or other right. application circuits shown, if any, are typical examples illustr ating the operation of the devices. sony cannot assume responsibility for any problems arising out of the use of these circuits.
? 2 ? CXA3355ER block diagram and pin configuration 16 17 14 13 15 18 19 20 21 22 23 24 44 43 42 41 40 39 38 37 27 28 29 30 25 26 31 32 33 34 35 36 10 9 8 7 12 11 6 5 4 3 2 1 1540fo = 1575.42mhz ant sense rf_amp if_amp1 if_amp1 mixer mixer lpf hpf bias lna 1536fo [1539fo] 4fo [fo] dmps mc pfd rc cp sc pll ctl if phase shifter a/d converter if_amp2 90? 2 gnd (rf) gnd (rf) rf_inp rf_inn gnd v cc 1 (lna) lna_out gnd gnd lna_in gnd (lna) gnd (lna) gnd (lna) vco_i c_vco gnd lpf v cc 1 (pll) gnd (pll) tcxo clk_out lt v cc 1 (rf) v cc 1 (rf) testinp testinn testoutp testoutn v cc 1 (if) gnd (if) r_ext1 enable r_ext2 asens diag ailim gnd (ant) v cc 3 (ant) c_ext data_out v cc 2 (if) gnd (if) data clk fo mode: if = 1.023mhz 4fo mode: if = 4.092mhz
? 3 ? CXA3355ER pin description pin no. standard pin voltage [v] dc ac equivalent circuit ?? 1 v cc 3 (ant) gnd (ant) 1 ?? 2 2 v cc 3 (ant) gnd (ant) ?? 3 v cc 3 (ant) gnd (ant) 3 0? 4 3.0 ? 5 1.2 ? 6 6 v cc 1 (if) gnd (if) description antenna sense input. antenna sense output. antenna sense current limitation. connect to the external pnp transistor base pin. antenna sense gnd. antenna sense v cc . leave open when not using the antenna sense function. capacitor connection for canceling the offset. symbol asens diag ailim gnd (ant) v cc 3 (ant) c_ext
? 4 ? CXA3355ER pin no. symbol standard pin voltage [v] dc ac equivalent circuit ? 1.8vp-p 7 7 v cc 2 (if) gnd (if) 1.8 0 ? ? 8 9 ?? 10 11 10 12 v cc 1 (pll) v cc 2 (if) gnd (pll) ?? 11 ?? 12 ? 1.8vp-p 13 13 v cc 2 (if) gnd (if) ?? 14 14 v cc 1 (pll) gnd (pll) 0 1.8 ? ? 15 16 description data (if) output. if block v cc . if block gnd. serial data input. serial data clock input. latch signal input. tcxo clock output. leave open when not using the tcxo clock. reference frequency input. pll block gnd. pll block v cc . data_out v cc 2 (if) gnd (if) data clk lt clk_out tcxo gnd (pll) v cc 1 (pll)
? 5 ? CXA3355ER pin no. symbol standard pin voltage [v] dc ac equivalent circuit 1.2 ? 17 17 v cc 1 (pll) gnd (pll) 0? 18 1.1 ? 19 19 v cc 1 (rf) gnd (rf) 0.1 ? 20 20 v cc 1 (rf) gnd (rf) 0 0 0 ? ? ? 21 22 23 description pll loop filter connection. gnd. capacitor connection for decoupling the vco bias circuit. capacitor connection for decoupling the vco bias circuit. lna block gnd. lna block gnd. lna block gnd. lpf gnd c_vco vco_i gnd (lna) gnd (lna) gnd (lna) 0.8 ? 24 v cc 1 (lna) gnd (lna) 24 27 lna input. lna_in 1.8 ? 27 lna output. lna_out
? 6 ? CXA3355ER pin no. symbol standard pin voltage [v] dc ac equivalent circuit 1.7 ? 30 v cc 1 (rf) gnd (rf) 30 31 0 0 1.8 1.8 ? ? ? ? 32 33 34 35 description rf amplifier input. rf block gnd. rf block gnd. rf block v cc . rf block v cc . rf_inn gnd (rf) gnd (rf) v cc 1 (rf) v cc 1 (rf) 1.3 ? 36 37 v cc 1 (if) gnd (if) 36 if signal input when using an external filter. testinp 1.3 ? 37 if signal input when using an external filter. testinn 0 0 1.8 0 ? ? ? ? 25 26 28 29 gnd. gnd. lna block v cc . gnd. gnd gnd v cc 1 (lna) gnd 1.7 ? 31 rf_inp 0.5 ? 38 39 v cc 1 (if) gnd (if) 38 if signal output when using an external filter. testoutp 0.5 ? 39 if signal output when using an external filter. testoutn 1.8 0 ? ? 40 41 if block v cc . if block gnd. v cc 1 (if) gnd (if)
? 7 ? CXA3355ER pin no. symbol standard pin voltage [v] dc ac equivalent circuit 0.5 ? 42 42 v cc 1 (if) gnd (if) description external resistor connection. (bias) r_ext1 ?? 43 43 v cc 1 (if) v cc 2 (if) gnd (if) enable signal input. high (v_ih: 1.2v min.): active mode low (v_il: 0.2v max.): power save mode enable 1.2 ? 44 44 v cc 1 (if) gnd (if) external resistor connection. (bias) r_ext2
? 8 ? CXA3355ER electrical characteristics dc characteristics (v cc 1 = v cc 2 = 1.8v, v cc 3 = open, ta = 25c) item conditions supply current 1 supply current 2 supply current 3 input impedance output impedance fo mode, excluding the antenna sense circuit 4fo mode, excluding the antenna sense circuit power save mode pin 36 (testinp), pin 37 (testinn) pin 38 (testoutp), pin 39 (testoutn) symbol i cc 1 i cc 2 i cc 3 zin zout note: fo mode and 4fo mode use the following power-on reset conditions. fo mode: tcxo = 18.414mhz, f lo = 1574.397mhz, if = 1.023mhz 4fo mode: tcxo = 16.368mhz, f lo = 1571.328mhz, if = 4.092mhz ac characteristics (v cc 1 = v cc 2 = 1.8v, v cc 3 = open, ta = 25c) item conditions total voltage gain lna nf1 lna nf2 total nf1 total nf2 p-1db input image rejection ratio lpf1 (fo mode) lpf2 (fo mode) lpf3 (fo mode) bpf1 (4fo mode) bpf2 (4fo mode) bpf3 (4fo mode) bpf4 (4fo mode) c/n 100k spurious component symbol g nf1 nf2 tnf1 tnf2 p1db imrr lpf1 lpf2 lpf3 bpf1 bpf2 bpf3 bpf4 c/n sp note: fo mode and 4fo mode use the following power-on reset conditions. fo mode: tcxo = 18.414mhz, f lo = 1574.397mhz, if = 1.023mhz 4fo mode: tcxo = 16.368mhz, f lo = 1571.328mhz, if = 4.092mhz excluding the a/d converter 50 ? matching, fo mode 50 ? matching, 4fo mode 50 ? matching, fo mode 50 ? matching, 4fo mode up to before the a/d converter detuning frequency = 1.023mhz, 4.092mhz @150khz normalized at the 1.023mhz level @2.046mhz normalized at the 1.023mhz level @6mhz normalized at the 1.023mhz level @1mhz normalized at the 4.092mhz level @3.069mhz normalized at the 4.092mhz level @5.115mhz normalized at the 4.092mhz level @12mhz normalized at the 4. 092mhz level 4fo mode, tcxo = 16.368mhz 4fo mode, ratio of the carrier level and the reference leak level min. typ. max. 7 9 ? 50 50 11 13 0.1 100 100 15 17 1 200 200 unit ma ma a ? ? min. typ. max. 85 ? ? ? ? ? ? ?5 ?13 ? ? ?9 ?9 ? ? ? 100 3.0 2.0 5.0 4.0 ?100 ?40 ? ? ? ? ? ? ? ?70 ?40 ? 6 5 8.5 7.5 ? ?20 4 2 ?13 ?6 6.5 6.5 ?6 ?55 ? unit db db db db db dbm dbc db db db db db db db dbc/hz dbc
? 9 ? CXA3355ER if output signal (data_out) (v cc 1 = v cc 2 = 1.8v, v cc 3 = open, ta = 25c) item data_out rise time data_out fall time symbol dtr dtf enable signal (v cc 1 = 1.8 0.2v, v cc 1 v cc 2 3.3v, 2.7v v cc 3 3.3v, ta = 25c) item input voltage high level input voltage low level symbol evih evil power-on reset function (v cc 1 = 1.8 0.2v, v cc 1 v cc 2 3.3v, 2.7v v cc 3 3.3v, ta = 25c) item allowable rise time symbol mtr tcxo (v cc 1 = v cc 2 = 1.8v, v cc 3 = open, ta = 25c) item input level clk_out rise time clk_out fall time symbol vtcxo ctr ctf unit ns ns unit v v unit vp-p ns ns min. typ. max. ? ? 6 4 ? ? min. typ. max. 1.2 ?0.1 ? ? v cc 2 + 0.2 0.2 min. typ. max. 0.2 ? ? 0.6 6 4 1.2 ? ? conditions pin 7 (data_out) 10 to 90% load = 1m ? //13pf pin 7 (data_out) 10 to 90% load = 1m ? //13pf conditions pin 43 (enable) input voltage high level threshold voltage pin 43 (enable) input voltage low level threshold voltage conditions enable and power supply (v cc 1, v cc 2) rise time for the power-on reset function to operate. note: use an enable and power supply (v cc 1, v cc 2) rise time of 100ms or less. conditions input level to pin 14 (tcxo) pin 13 (clk_out) 10 to 90% load = 1m ? //13pf pin 13 (clk_out) 10 to 90% load = 1m ? //13pf threshold voltage value (v cc 1 = 1.8 0.2v, v cc 1 v cc 2 3.3v, 2.7v v cc 3 3.3v, ta = 25c) item logic input voltage high level logic input voltage low level logic output voltage high level logic output voltage low level symbol vih vil voh vol unit v v v v v min. typ. max. v cc 2 ? 0.2 ?0.1 v cc 3 ? 0.2 v cc 2 ? 0.2 0 ? ? ? ? ? v cc 2 + 0.2 0.2 v cc 3 v cc 2 0.2 conditions logic input pins = pin 10 (data), pin 11 (clk), pin 12 (lt) logic input pins = pin 10 (data), pin 11 (clk), pin 12 (lt) logic output pin = pin 2 (diag) logic output pins = pin 7 (data_out), pin 13 (clk_out) logic output pins = pin 7 (data_out), pin 13 (clk_out) unit ms min. typ. max. ? ? 100
? 10 ? CXA3355ER threshold voltage value (antenna sense) (v cc 1 = v cc 2 = 1.8v, v cc 3 = 3v, ta = 25c) item conditions min. typ. max. threshold voltage 1 threshold voltage 2 threshold voltage at which connection of the prescribed load is detected from the open status threshold voltage for switching to the short status from the prescribed load connected status 10 140 30 170 60 200 unit mv mv symbol vs1 vs2
? 11 ? CXA3355ER electrical characteristics measurement circuit enable pin v cc 2 (if): active mode gnd: power save mode 0.1 0.1 10p 10n tcxo input level: 0.2 to 1.2vp-p clk_out v cc 1 (pll) v cc 1 (lna) v cc 1 (pll) v cc 2 (if) v cc 2 (if) v cc 1 (if) v cc 1 (rf) 10p 8p 100p 24k 12p 12p lna_in lna_out rf_in 3.3p 18n 12n 3p 100p 1p 2.7p 50 ? matching condition diag data_out ant 18n 3.9n 4.7n 1n bus control 39k 33k 0.1 1n buffer buffer testin testout 16 17 14 13 15 18 19 20 21 22 23 24 44 43 42 41 40 39 38 37 27 28 29 30 25 26 31 32 33 34 35 36 10 9 8 7 12 11 6 5 4 3 2 1 gnd (rf) gnd (rf) rf_inp rf_inn gnd v cc 1 (lna) lna_out gnd gnd lna_in gnd (lna) gnd (lna) gnd (lna) vco_i c_vco gnd lpf v cc 1 (pll) gnd (pll) tcxo clk_out lt v cc 1 (rf) v cc 1 (rf) testinp testinn testoutp testoutn v cc 1 (if) gnd (if) r_ext1 enable r_ext2 asens diag ailim gnd (ant) v cc 3 (ant) c_ext data_out v cc 2 (if) gnd (if) data clk ? the rf block bypass capacitors should have excellent high frequency characteristics. ? use parts with a tolerance of 1% for the following resistor elements. other parts should have a tolerance of 5%. pin 17 (lpf) pin 42 (r_ext1) pin 44 (r_ext2)
? 12 ? CXA3355ER measurement methods note: the measurement methods in 4fo mode (tcxo = 16.368mhz, if = 4.092mhz) are described below. 1) total gain input: lna_in output: testoutp (pin 38), testoutn (pin 39) ... [pins 38 and 39 are differential output.] serial data setting: test output block "4" (if amp2 output block) ... see page 19. monitor method: (1) perform differential ? single conversion using an external buffer circuit and measure the output level. ... [sony recommended method] (2) measure pins 38 and 39 with a differential probe. ? total gain: output level [dbm] ? sg input level to lna_in [dbm] 2) lna nf input: lna_in output: lna_out ? compensate for the evaluation board and coaxial cable loss, and measure the nf value at the ic end. [sony recommended measuring instruments] noise source: agilent 346a nf meter: agilent n8973a spectrum analyzer center freq. = 4.092mhz span = 10khz rbw = 100hz vbw = 100hz lna_in testout 50 ? 50 ? 50 ? signal generator freq. = 16.368mhz amp. = 0dbm tcxo signal generator freq. = 1575.42mhz amp. = ?120dbm external buffer v cc 1 (rf) v cc = 1.8v enable v cc 1 (if) v cc 2 (if) v cc 3 (ant) v cc 1 (pll) v cc 1 (lna) testoutp testoutn open gnd evaluation board microwave coaxial cable microwave coaxial cable microwave coaxial cable ic ? all gnd pins lna_in lna_out 50 ? noise source signal generator freq. = 16.368mhz amp. = 0dbm tcxo freq. = 1575.42mhz bw = 2mhz nf meter v cc 1 (rf) v cc = 1.8v enable v cc 1 (if) v cc 2 (if) v cc 3 (ant) v cc 1 (pll) v cc 1 (lna) open gnd ic microwave coaxial cable microwave coaxial cable microwave coaxial cable evaluation board ? all gnd pins
? 13 ? CXA3355ER 3) total nf input: lna_in output: testoutp (pin 38), testoutn (pin 39) ... [pins 38 and 39 are differential output.] serial data setting: test output block "3" (if filter output block) ... see page 19. monitor method: (1) perform differential ? single conversion using an external buffer circuit and measure the output level. ... [sony recommended method] (2) measure pins 38 and 39 with a differential probe. ? total nf: calculate nf from the noise power ratio when the dc 28v applied to the noise source is switched on and off. use the 346a made by agilent as the noise source for measurement. spectrum analyzer center freq. = 4.092mhz span = 10khz rbw = 100hz vbw = 100hz lna_in testout 50 ? 50 ? signal generator freq. = 16.368mhz amp. = 0dbm tcxo external buffer v cc 1 (rf) v cc = 1.8v dc 28v on/off enable v cc 1 (if) v cc 2 (if) v cc 3 (ant) v cc 1 (pll) v cc 1 (lna) testoutp testoutn open gnd ic noise source microwave coaxial cable microwave coaxial cable evaluation board ? all gnd pins 4) p-1db input input: lna_in output: testoutp (pin 38), testoutn (pin 39) ... [pins 38 and 39 are differential output.] serial data setting: test output block "4" (if amp2 output block) ... see page 19. monitor method: (1) perform differential ? single conversion using an external buffer circuit and measure the output level. ... [sony recommended method] (2) measure pins 38 and 39 with a differential probe. ? p-1db input: input level [dbm] at the point when the response drops by 1db from the desired signal straight line extension. spectrum analyzer center freq. = 4.092mhz span = 10khz rbw = 100hz vbw = 100hz lna_in testout 50 ? 50 ? 50 ? signal generator freq. = 16.368mhz amp. = 0dbm tcxo signal generator freq. = 1575.42mhz amp. = ?120 to ?90dbm external buffer v cc 1 (rf) v cc = 1.8v enable v cc 1 (if) v cc 2 (if) v cc 3 (ant) v cc 1 (pll) v cc 1 (lna) testoutp testoutn open gnd ic microwave coaxial cable microwave coaxial cable microwave coaxial cable evaluation board ? all gnd pins nf calculation formula y = nf = 10 log n on : noise power when the dc 28v is on. n off : noise power when the dc 28v is off. enr: excess noise ratio n on n off enr y ? 1 ()
? 14 ? CXA3355ER 5) image rejection ratio input: lna_in output: testoutp (pin 38), testoutn (pin 39) ... [pins 38 and 39 are differential output.] serial data setting: test output block "2" (adder output block) ... see page 19. monitor method: (1) perform differential ? single conversion using an external buffer circuit and measure the output level. ... [sony recommended method] (2) measure pins 38 and 39 with a differential probe. ? imrr (detuning frequency 4mhz): image wave output level (at 1575.42mhz input) [dbm] ? desired wave output level (at 1567.236mhz input) [dbm] spectrum analyzer center freq. = 4.092mhz span = 10khz rbw = 100hz vbw = 100hz lna_in testout 50 ? 50 ? 50 ? signal generator freq. = 16.368mhz amp. = 0dbm tcxo signal generator freq. = 1575.42mhz (desired wave) 1567.236mhz (image wave) amp. = ?75dbm external buffer v cc 1 (rf) v cc = 1.8v enable v cc 1 (if) v cc 2 (if) v cc 3 (ant) v cc 1 (pll) v cc 1 (lna) testoutp testoutn open gnd ic microwave coaxial cable microwave coaxial cable microwave coaxial cable evaluation board ? all gnd pins 6) filter response input: lna_in output: testoutp (pin 38), testoutn (pin 39) ... [pins 38 and 39 are differential output.] serial data setting: test output block "3" (if filter output block) ... see page 19. monitor method: (1) perform differential ? single conversion using an external buffer circuit and measure the output level. ... [sony recommended method] (2) measure pins 38 and 39 with a differential probe. ? filter response: vary the input frequency to lna_in and measure the output level. normalize fo (4fo) to the reference (0db). spectrum analyzer center freq. = 150khz to 100mhz span = 10khz rbw = 100hz vbw = 100hz lna_in testout 50 ? 50 ? 50 ? signal generator freq. = 16.368mhz amp. = 0dbm tcxo signal generator freq. = 1571.388mhz to 1675.42mhz amp. = ?75dbm external buffer v cc 1 (rf) v cc = 1.8v enable v cc 1 (if) v cc 2 (if) v cc 3 (ant) v cc 1 (pll) v cc 1 (lna) testoutp testoutn open gnd ic microwave coaxial cable microwave coaxial cable microwave coaxial cable evaluation board ? all gnd pins
? 15 ? CXA3355ER 7) c/n input: lna_in output: testoutp (pin 38), testoutn (pin 39) ... [pins 38 and 39 are differential output.] serial data setting: test output block "1i" (ich mixer output block) ... see page 19. monitor method: (1) perform differential ? single conversion using an external buffer circuit and measure the output level. ... [sony recommended method] (2) measure pins 38 and 39 with a differential probe. ? c/n: carrier + 100khz noise level ? carrier level [dbc/hz] spectrum analyzer center freq. (carrier) = 4.092mhz (noise) = 4.192mhz span = 10khz rbw = 100hz vbw = 100hz lna_in testout 50 ? 50 ? 50 ? signal generator freq. = 16.368mhz amp. = 0dbm tcxo signal generator freq. = 1575.42mhz amp. = ?60dbm external buffer v cc 1 (rf) v cc = 1.8v enable v cc 1 (if) v cc 2 (if) v cc 3 (ant) v cc 1 (pll) v cc 1 (lna) testoutp testoutn open gnd ic microwave coaxial cable microwave coaxial cable microwave coaxial cable evaluation board ? all gnd pins 8) spurious input: lna_in output: testoutp (pin 38), testoutn (pin 39) ... [pins 38 and 39 are differential output.] serial data setting: test output block "4" (if amp2 output block) ... see page 19. measure the spurious components separated by a certain frequency from the carrier. ? spurious: each spurious output level ? carrier level [dbc] spectrum analyzer center freq. = 4.092mhz span = 10khz rbw = 100hz vbw = 100hz lna_in testout 50 ? 50 ? 50 ? signal generator freq. = 16.368mhz amp. = 0dbm tcxo signal generator freq. = 1575.52mhz amp. = ?120dbm external buffer v cc 1 (rf) v cc = 1.8v enable v cc 1 (if) v cc 2 (if) v cc 3 (ant) v cc 1 (pll) v cc 1 (lna) testoutp testoutn open gnd ? all gnd pins ic microwave coaxial cable microwave coaxial cable microwave coaxial cable evaluation board
? 16 ? CXA3355ER 9) antenna sense var y v s and measure the diag pin voltage. var y v s and measure the inflow current ib to ailim. v cc 1 (rf) ailim diag asens vs v cc = 1.8v v cc 3 = 3.0v enable v cc 1 (if) v cc 2 (if) v cc 3 (ant) v cc 1 (pll) v cc 1 (lna) gnd ? all gnd pins ic v a evaluation board
? 17 ? CXA3355ER initial settings the CXA3355ER is initialized by setting the enable signal (pin 43) from low level to high level. the timing, etc. should satisfy the conditions below. in addition, the tcxo frequency and if frequency combinations in the table below can be obtained by setting pin 10 (data), pin 11 (clk) and pin 12 (lt) as shown in the table and then performing initialization. this eliminates the need for serial data setting. 1. during power-on the CXA3355ER is initialized by simultaneously raising the power supplies and the enable signal (pin 43) during power-on. the power supply and enable signal (pin 43) rise time should be 100ms or less. in addition, the power supplies (v cc 1, v cc 2) should rise simultaneously. the antenna sense circuit power supply (v cc 3) should be left open except when using the antenna sense function. 2. initialization after power-on after power-on, the CXA3355ER is initialized by setting the enable signal (pin 43) to low level for 10ms or more and then setting it to high level. pin 10 (data) gnd vcc2 vcc2 pin 11 (clk) gnd gnd vcc2 pin 12 (lt) gnd gnd gnd tcxo frequency [mhz] 16.368 18.414 13 if frequency [mhz] 4.092 1.023 0.976 v cc 0.9 v cc 0.1 v cc gnd 100ms or less power supply, enable v cc gnd power supply v cc gnd 10ms or more 0.5 v cc enable
? 18 ? CXA3355ER serial data settings the CXA3355ER can make the pll counter settings, perform tcxo_clk output, select the internal if filter, and use the test i/o circuit according to the serial data settings (3-wire bus control). the transfer bit length is 18 bits, and there are four addresses. the address is set by the a1 and a0 bits. the timing, etc. should satisfy the conditions below. serial data format a1 0 0 1 1 a0 0 1 0 1 d15 mc10 sc4 ti2 0 d14 mc9 sc3 ti1 0 d13 mc8 sc2 ti0 0 d12 mc7 sc1 to2 0 d11 mc6 sc0 to1 0 d10 mc5 rc8 to0 0 d9 mc4 rc7 0 0 d8 mc3 rc6 0 0 d7 mc2 rc5 0 0 d6 mc1 rc4 0 0 d5 mc0 rc3 0 0 d4 0 rc2 0 0 d3 0 rc1 0 0 d2 0 rc0 0 0 d1 clk 0 fil 0 d0 0 tcl 0 0 msb lsb mc (0 to 10): main counter frequency division value setting sc (0 to 4): swallow counter frequency division value setting rc (0 to 8): reference counter clk: tcxo clk output (0: not output, 1: output) fil: internal filter selection (0: fo mode lpf, 1: 4fo mode bpf) tcl: if block test i/o control (0: when not using the test i/o circuit, 1: when using the test i/o circuit) ti (0 to 2): if block test input location setting to (0 to 2): if block test output location setting 0: logic input voltage low level 1: logic input voltage high level 18-bit data format serial data interface bus timing (3-wire bus control) t sd t hd t hl t whlt clk data lt t low t high t sd = data setup time t hd = data hold time t low = low period of clk t high = high period of clk t sl = lt setup time t whlt = high pulse width (lt) t whlt 100ns t sd , t hd , t low , t high , t hl , t whlt 50ns a1 a0 d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 data clk lt latch invalid data invalid data address data each data ? input data to all four addresses. time
? 19 ? CXA3355ER description of functions 1. test circuit the CXA3355ER has a test circuit for test signal i/o. the test circuit is connected between each if block, and test i/o control can be performed by the serial data settings. the test circuit location, configuration and the serial data settings are as follows. test circuit location and configuration 44 43 42 41 40 39 38 37 30 31 32 33 34 35 36 36 37 38 39 7 6 5 4 3 2 1 1540fo = 1575.42mhz ant sense local if_amp1 rf_amp if_amp1 mixer mixer "1i" "1q" lpf hpf bias if phase shifter a/d converter if_amp2 90? "2" "3" "4" test input control test output control ? actual operation is differential, but only one side is shown. ? the inter-circuit connections are cut off during test input selection and test output selection. from each if block to each if block "1i": ich mixer output block (ich if amp1 input block) "1q": qch mixer output block (qch if amp1 input block) "2": adder output block (if filter input block) "3": if filter output block (if amp2 input block) "4": if amp2 output block (a/d converter input block) ? set the tcl register to "1" when using or to "0" when not using the test input circuit or the test output circuit. (see page 18.) ti2 0 0 0 0 1 1 1 1 ti1 0 0 1 1 0 0 1 1 ti0 0 1 0 1 0 1 0 1 test input block normal operation ich if amp1 input block qch if amp1 input block not used. not used. if filter input block if amp2 input block a/d converter input block serial data settings for test input selection to2 0 0 0 0 1 1 1 1 to1 0 0 1 1 0 0 1 1 to0 0 1 0 1 0 1 0 1 test output block normal operation ich mixer output block qch mixer output block not used. not used. adder output block if filter output block if amp2 output block serial data settings for test output selection 0: logic input voltage low level 1: logic input voltage high level
? 20 ? CXA3355ER 2. using an external filter when using the CXA3355ER in 4fo mode with the initial settings (see page 17) which do not require serial data setting, input and output are performed via the test circuit located between the internal if filter and the if amp2 in the following stage, so an external filter is necessary. the external filter uses pins 36 to 39. differential i/o is performed with pin 38 (testoutp) and pin 39 (testoutn) as the internal if filter output pins and pin 36 (testinp) and pin 37 (testinn) as the input pins to if amp2. also, the impedance is 200 ? (differential) for both input and output. note that the bias voltage is determined inside the ic, so pins 36 and 37 should not be connected directly with pins 38 and 39. when not using an external filter, eliminate the dc components using an approximately 10nf capacitor. the overall external filter block and the external filter configuration are shown below. overall external filter block external filter configuration 39 38 37 36 pin 36: testinp pin 37: testinn pin 38: testoutp pin 39: testoutn lpf hpf to the comparator CXA3355ER external filter secondary lpf secondary hpf external filter i/o circuit if amp2 zout 200 ? zin 200 ? internal filter internal filter + external filter CXA3355ER if filter response (example of representative characteristics) normalized at 4mhz ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 10 012345678910 detuning frequency [mhz] response [db] pin 38 pin 39 pin 37 pin 36 c1 c3 l1 l2 c5 l3 c4 c6 l4 c7 c8 c9 c12 c13 c10 c11 l5, l6 (2 series) c2 chip c c1 c2, c3 c4 c5, c6 c7 c8, c9, c12, c13 c10, c11 [pf] 91 300 240 91 130 680 1500 chip l l1, l2 l3, l4 l5, l6 [h] 2.2 3.9 4.7
? 21 ? CXA3355ER description of operation overview of operation this ic down-converts the gps (global positioning system) frequency of 1.57542ghz to fo (fo: 1.023mhz) or 4fo (4fo: 4.092mhz). the internal configuration is divided into the analog block, consisting of the amplifier, mixer and filters, and the digital block (including the comparator block and the control block), which forms the pll. the analog block converts the frequency and amplifies the signal with the amplifier and the mixer, and eliminates undesired components with the filters. the digital block can switch the pll frequency division ratio in order to down convert the output signal to fo or 4fo. 1. lna the gps signal that passes through the antenna is input to pin 24 via a matching circuit as shown in the figure below. the input signal is amplified by the lna, and then output from pin 27. always use matching circuits for the lna input pin (pin 24) and the lna output pin (pin 27), and match at 1.57542ghz. 2. rf amplifier, rf mixer, if phase shifter and adder the signal amplified by the lna passes through the saw filter, and is then input to pin 30 via a matching circuit. the input signal is amplified by the rf amplifier, and then down-converted by the rf mixer to the fo (1.023mhz) or 4fo (4.092mhz) i and q components. the if signal down-converted to the i and q components has the image component eliminated by the phase shifter and the adder, and is then input to the if filter. always use a matching circuit for the rf amplifier input pin (pin 30), and match at 1.57542ghz. 31 30 27 24 lna 1540fo 0? 90? to the if filter fo or 4fo adder fo: 1.023mhz saw matching circuit 90? matching circuit matching circuit phase shifter
? 22 ? CXA3355ER 3. if filter the if signal that passed through the adder has the undesired components outside the band eliminated by the if filter. in fo mode the signal passes through only the lpf and is input to if amp2. in 4fo mode the signal passes through the lpf and then the hpf and is input to if amp2. note that fo mode and 4fo mode can be switched by the serial data setting. set the serial data setting register fil to "0" for fo mode (lpf) or to "1" for 4fo mode (bpf). in addition, an external filter can also be connected to this ic using pins 36 to 39. (see page 20.) to if amp2 from the adder lpf hpf 4. if amp2 and a/d converter the signal that passed through the if filter is amplified by if amp2, converted to a binary signal by the a/d converter, and then output from the data output pin (pin 7). the a/d converter performs sampling at the tcxo clk. in addition, the a/d converter output voltage high level is v cc 2 (1.6 to 3.3v), so a wide range of interfaces can be supported. 5. tcxo (pin 14) input the signal from the external oscillator to pin 14 via a capacitor as the reference signal. input frequencies from 10mhz to 26mhz are supported. the input signal level from the external oscillator should be 1.2vp-p or less (0.6vp-p typ., 0.2vp-p min.). this is also the same in power save mode. however, using the typical level of 0.6vp-p is recommended from the viewpoint of reducing harmful waves to the receive block, etc. 6. tcxo clk output (pin 13) this ic can output tcxo clk from pin 13 according to the serial data setting. the output voltage high level is v cc 2 (1.6 to 3.3v), so a wide range of interfaces can be supported. set the serial data setting register clk to "0" when not using tcxo clk, or to "1" when using tcxo clk. (see page 18.)
? 23 ? CXA3355ER 7. pll/vco the pll is comprised by a vco, frequency divider and phase/frequency comparator as shown in the figure below, and incorporates an inductor, varactor and all other necessary components. the loop filter is externally connected. use components that satisfy the required characteristics. serial data setting is unnecessary when this ic is used with the typical tcxo and if combinations set by the initial settings shown in page 17. when making serial data settings, set counter frequency division values that satisfy the following equations. f vco = (m n + a) (f tcxo 2) r (f tcxo 2) r > 800khz n 3, r 3 f vco : vco oscillation frequency, f tcxo : tcxo frequency mc data = n, sc data = a, rc data = r, dmps data = m = 24 (fixed) 17 14 mc 1/n sc 1/a rc 1/r pfd cp frequency division ratio (m n) + a tcxo (10mhz to 26mhz) to the rf phase shifter loop filter 2 v cc 1 ? m = 24 vco dmps 1/m, 1/(m + 1) 8. enable (pin 43) active mode and power save mode can be switched according to the level. high (v_ih: 1.2v min.): active mode low (v_il: 0.2v max.): power save mode
? 24 ? CXA3355ER 9. antenna sense the power supply lines are separated internally, so antenna sense operation at the supply voltage (v cc 3) of 3.0 0.3v is recommended. note that the antenna sense function does not operate independently, so voltage should also be applied to the other power supply pins (v cc 1, v cc 2) for use in active mode. in addition, leave the power supply pin (v cc 3) open when not using the antenna sense function. the antenna sense function checks whether an antenna is connected. pin 2 (diag) outputs high voltage when an antenna is not connected, or low voltage when an antenna is connected. a current limiting circuit is provided as a countermeasure against short circuits. the diag pin voltage switching point is as shown in the table below. v1, v2, v3 and ib in the table below are as follows. v1: 10 to 60mv threshold voltage at which connection of the prescribed load is detected from the open status v2: 140 to 200mv threshold voltage for switching to the short status from the prescribed load connected status. v3: 250mv current limiting threshold voltage. ib: 1.7 to 2.1ma base current in the normal connection status. antenna sense block circuit 3 1 2 r3 diag ib v cc 3 (ant) v cc 3 (ant) v1 v2 v3 a1 a2 a3 vd va vs CXA3355ER asens ailim diag [v] v1 v2 vs ib [ma] v3 vs i1 i1 = 1.9ma (typ.) mode vs < v1 v1 < vs < v2 v2 < vs connection status open normal connection short diag voltage high low high
? 25 ? CXA3355ER application circuit enable pin vcc2 (if): active mode gnd: power save mode 0.1 0.1 10p 10n tcxo input level: 0.2 to 1.2vp-p v cc 1 (pll) v cc 1 (lna) saw filter v cc 1 (lna) v cc 1 (rf) v cc 1 (if) v cc 1 (pll) v cc 2 (if) v cc 1 (pll) v cc 2 (if) v cc 2 (if) v cc 1 (if) v cc 1 (rf) 10p 8p 100p 24k 12p 12p 3.3p 18n 12n 3p 100p 1p 2.7p data_out 18n 3.9n 4.7n 1n 39k 33k 1n 10n 10n 16 17 14 13 15 18 19 20 21 22 23 24 44 43 42 41 40 39 38 37 27 28 29 30 25 26 31 32 33 34 35 36 10 9 8 7 12 11 6 5 4 3 2 1 gnd (rf) gnd (rf) rf_inp rf_inn gnd v cc 1 (lna) lna_out gnd gnd lna_in gnd (lna) gnd (lna) gnd (lna) vco_i c_vco gnd lpf v cc 1 (pll) gnd (pll) tcxo clk_out lt v cc 1 (rf) v cc 1 (rf) testinp testinn testoutp testoutn v cc 1 (if) gnd (if) r_ext1 enable r_ext2 asens diag ailim gnd (ant) v cc 3 (ant) c_ext data_out v cc 2 (if) gnd (if) data clk 0.1 1 v cc = 1.8v number of parts resistors: 3pcs capacitors: 20pcs inductors: 5pcs saw filter: 1pcs (excluding the antenna sense circuit) ? this diagram shows the application circuit when the initial settings are made for 4fo mode. (see page 17.) ? the rf block bypass capacitors should have excellent high frequency characteristics. ? use parts with a tolerance of 1% for the following resistor elements. other parts should have a tolerance of 5%. pin 17 (lpf) pin 42 (r_ext1) pin 44 (r_ext2) application circuits shown are typical examples illustrating the operation of the devices. sony cannot assume responsibility fo r any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same .
? 26 ? CXA3355ER ?35 ?30 ?25 ?20 ?15 ?10 ?5 0 5 10 0.1 1 10 100 detuning frequency [mhz] filter response [db] fo upper spec (fo) lower spec (fo) ?35 ?30 ?25 ?20 ?15 ?10 ?5 0 5 10 0.1 1 10 100 detuning frequency [mhz] filter response [db] 4fo upper spec (4fo) lower spec (4fo) ?40 ?35 ?30 ?25 ?20 ?15 ?10 ?5 0 5 10 ?135 ?130 ?125 ?120 ?115 ?110 ?105 ?100 ?95 ?90 ?85 lna_in input level [dbm] if amp2 output level [dbm] 5 10 15 20 1.60 1.65 1.70 1.75 1.80 1.85 1.90 1.95 2.00 vcc [v] icc [ma] fo 4fo 0 2 4 6 8 10 012345 if frequency [mhz] total nf [db] ?65 ?60 ?55 ?50 ?45 ?40 ?35 ?30 ?25 ?20 0.1 1 10 detuning frequency [mhz] imrr [dbc] graph 1. i cc graph 2. total gain graph 5. filter response (normalized at 1.023mhz) v cc 1 = v cc 2 = 1.8v v cc 3 = open temp = 25?c graph 6. filter response (normalized at 4.092mhz) graph 3. total nf graph 4. image rejection ratio 4fo mode fo mode v cc 1 = v cc 2 = 1.8v v cc 3 = open temp = 25?c v cc 1 = v cc 2 = 1.8v v cc 3 = open temp = 25?c v cc 1 = v cc 2 = 1.8v v cc 3 = open temp = 25?c v cc 1 = v cc 2 = 1.8v v cc 3 = open temp = 25?c v cc 1 = v cc 2 = 1.8v v cc 3 = open temp = 25?c supplement materials (example of representative characteristics)
? 27 ? CXA3355ER 0 0.5 1.0 1.5 2.0 2.5 0 0.1 0.2 0.3 0.4 0.5 0.6 vs [v] ib [ma] ib 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 0 0.1 0.2 0.3 0.4 0.5 0.6 vs [v] diag [v] diag upper spec lower spec ?100 ?90 ?80 ?70 ?60 ?50 ?40 0.01 0.1 1 frequency difference from the carrier [mhz] c/n [dbc/hz] ?85 ?80 ?75 ?70 ?65 ?60 evaluation board lna_in pin local leak [dbm] graph 9a. antenna sense (v s vs. diag) graph 9b. antenna sense (v s vs. ib) graph 7. local leak v cc 1 = v cc 2 = 1.8v v cc 3 = open temp = 25?c graph 8. c/n v cc 1 = v cc 2 = 1.8v v cc 3 = open temp = 25?c v cc 1 = v cc 2 = 1.8v v cc 3 = 3v temp = 25?c v cc 1 = v cc 2 = 1.8v v cc 3 = 3v temp = 25?c
? 28 ? CXA3355ER sony corporation s 44pin vqfn (plastic) 0.8 0.1 sony code eiaj code jedec code package material lead treatment lead material epoxy resin solder plating copper alloy package structure vqfn-44p-02 pin 1 index 5.1 44 33 1 11 23 34 22 0.4 0.1 0.4 x4 a-b s 0.1 c 0.05 m a-b sc c a b 0.22 terminal section 2.0 2.0 4- 0.8 12 0.55 0.1 + 0.09 0.14 ? 0.03 max0.02 solder plating s 0.05 s + 0.09 0.31 ? 0.03 package mass 0.06g 0.4 0.175 0.135 note:cutting burr of lead are 0.05mm max. lead plating specifications item lead material copper alloy solder composition sn-bi bi:1-4wt% plating thickness 5-18m spec. package outline unit: mm

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